With increasing demand for miniaturized and high-capacity semiconductor package, various techniques for stack-type semiconductor packages are being developed so as to achieve miniaturization, high capacity and mounting efficiency.
The term “stack”, which is referred to in the semiconductor industry, means to vertically pile at least two semiconductor chips or packages. Stacking semiconductor chips or packages helps to realize a larger memory capacity and mounting area utilization efficiency of the semiconductor packages.
As an example of a stack-type semiconductor package, a structure using through-silicon vias has been suggested. A stack-type semiconductor package using through-silicon vias provides advantages in that, since electrical connections are formed through through-silicon vias, the operation speed of a semiconductor device can be increased and miniaturization is possible. In the stack-type semiconductor package using through-silicon vias, because signal transfer is implemented through the through-silicon vias, junction reliability is very important.
In order to electrically connect the semiconductor packages to each other, bumps are formed on the upper surface and/or the lower surface of each semiconductor chip in such a way as to be connected to the through-silicon vias. If heat is applied in the course of manufacturing the semiconductor packages, the through-silicon vias and the bumps, which are formed of a metallic substance with a coefficient of thermal expansion (CTE) greater than silicon, may be deformed by heat. As a consequence, cracks may occur in the interface between the through-silicon vias and the bumps, and in a severe case, the bumps and the through-silicon vias may be disconnected. That is, the anti-shearing reliability of the interface between the bumps and the through-silicon vias may become poor.
In addition, an adhesive component, which is formed between semiconductor packages to physically attach a semiconductor package to another semiconductor package, may be trapped between the through-silicon vias (or bumps) of an upper semiconductor package and the bumps (or through-silicon vias) of a lower semiconductor package. As a consequence, after the semiconductor packages are stacked, the electrical connections between the upper and lower semiconductor packages may be disconnected, and thus electrical reliability may deteriorate.